Investigation of gate dielectric interface on contact resistance of short channel organic thin film transistors (OTFT)

W4414154062 · 수집 2026-10-04 18:16:39

T10623 Thin-Film Transistor Technologies

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This study provides a comprehensive analysis of the impact of the interfacial properties on the performance of organic thin-film transistors (OTFTs) with a hybrid dielectric of Al2O3/PVP compared to single-layer dielectrics of Al2O3 and PVP. The analyses were performed using the 2D Silvaco Atlas numerical simulator, which conducted a detailed numerical investigation into how varying the thickness ratio of Al2O3 and PVP in the dielectric affects contact resistance and off-state current in short-channel OTFTs. High-K dielectric materials, such as Al2O3, offer low threshold voltages but lead to increased contact resistance and leakage current, while low-K dielectrics like PVP reduce leakage current but suffer from lower mobility and higher contact resistance. By utilizing a hybrid Al2O3/PVP dielectric, we successfully reduced the contact resistance to 4.84 KΩ.cm2, as extracted from VDS-ID characteristics at a gate voltage of -2V. Additionally, contact resistance significantly influenced the off-state current, particularly in devices of short channel length (1 μm). The PVP layer, with thicknesses ranging from 2.4 nm to 4.2 nm, effectively reduced charge carrier traps at the semiconductor/dielectric interface, enhancing mobility. Furthermore, hysteresis effects were examined through C-V characteristics by sweeping the gate voltage from -3V to +3V. These findings highlight the trade-offs in optimizing PVP thickness to balance interface quality and electrical performance in hybrid dielectric OTFTs.

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